Comprehensive Analysis of SoC Physical Design Quality with Timing, Power Integrity, and PVT Variability Considerations

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dc.contributor.authorGandhi, Himanshu
dc.date.accessioned2026-08-21T11:22:27Z
dc.date.available2026-08-21T11:22:27Z
dc.date.issued2026
dc.identifier.urihttp://nits.ndl.gov.in/handle/123456789/106
dc.language.isoen
dc.publisherNational Institute of Technology, Silchar
dc.titleComprehensive Analysis of SoC Physical Design Quality with Timing, Power Integrity, and PVT Variability Considerations
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