Variability Analysis of Metal Gate Work Function on Electrical Parameters for Nanosheet FET: A Statistical Simulation
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Date
2026
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National Institute of Technology, Silchar
Abstract
Over the last few decades, to increase the performance of the transistor, the size of the transistor has been reduced rapidly. It adversely affect the switching speed of the processor, but at the cost of degraded performance of traditional FETs. To scale the devices without degrading the performance, a new structure in which the gate covers all sides of the channel is reported, i.e., called a gate-all-around (GAA), but Nanosheet FETs (NSFETs) show good performance. This thesis shows a comprehensive analysis of DC and AC analysis of NSFETs with work function variability using 3D TCAD Sentaurus simulations, with a specific focus on metal-gate work function variability (WFV) and its effects on device reliability and circuit performance. Here, we have used TiN as a gate material with work function values of 4.4 and 4.6 eV in orientation <100> and <111> with probabilities of 40% and 60%, respectively, to study its effect on electrical parameters.
The DC analysis, like VT, ION, and IOFF, shows good improvement over FinFETs. The VT of the NSFETs is 13% lower than that of the FinFETs, with the ON Current increasing drastically by 76% compared to FinFETs. Moreover, the OFF-current of FinFET is also 87% lower than that of NSFET and thus, the switching ratio of NSFET is six times greater than that of FinFET. The effect of WFV of metal gate in NSFET for variation in threshold voltage (σVT), ON-state current (σION), OFF-state current (σIOFF), and switching ratio σ(ION/IOFF) is highlighted for different gate length (Lg), effective width (Weff), and grain sizes (Φ̅). As gate dimensions shrink into the deep- nanoscale, metal-gate granularity (MGG) produces fluctuations in the effective gate work function, which increases the variation in σVT, σION, σIOFF, and σ(ION/IOFF). As Φ̅ grows, the fluctuations in electrical parameters increase for different NSFET device dimensions. Results reveal that when Φ̅ is comparable to device dimensions, the variability of electrical parameters gets saturated. Furthermore, the transfer curve of 200 simulated devices and nominal values is plotted at different grain sizes. It is visualised that there are significant variations in drain current as Φ̅ is changed from 2 to 15 nm. The variability of all Analog/RF parameters like σgm, σCgg, σgds, σfT, and σAV decreases with increasing channel length and is reduced for small grain size (Φ̅). With an increase in fin width, the variability of Analog/RF parameters increases, which further degrades with increased grain size. Moreover, it is seen that the cut-off frequency and intrinsic gain are constant and decrease steeply with increasing fin width at different grain sizes.